Intel suffers another core talent loss: Narahari Ramanuja—former Advanced Packaging Technology Development Director with 25 years of experience—will leave by late September to head ADI’s Beaverton wafer fab, overseeing the analog chip giant’s $1 billion-upgraded critical production line (ADI also builds a Washington state plant to boost Northwest manufacturing).
This is the latest in Intel’s recent executive exodus. The firm now faces competitive and financial pressures, plus U.S. government plans to take a 10% stake—creating strategic uncertainty. Notably, Ramanuja helped Intel build significant advanced packaging capacity, but poor promotion left it long underutilized. Even as NVIDIA et al. face 3D wafer-level packaging demand beyond TSMC’s supply, TechInsights calls Intel’s excess advanced packaging capacity an "industry secret."
To revive this capacity, Intel is urging clients to switch from TSMC’s CoWoS packaging to its own Foveros platform and EMIB technology, touting a "seamless, no-redesign transition" and the advantage of unlimited production capacity.
Over the past year, weak advanced chip demand led Intel to cut 15,000 jobs twice—with at least 5,400 losses in Oregon (it remains the state’s top private employer and continues cutting-edge R&D). Other recent departures/retirements include ex-Manufacturing Head Ann Kelleher, Chief Packaging Engineer Duan Gang (now at Samsung Electro-Mechanics), and Fellow Matt Prince.
ICgoodFind notes Intel’s talent drain and underused capacity are dual challenges. Alongside external pressures, its progress in advanced packaging and talent replenishment will shape its future market standing.
