Technical parameters/access time: 15 ns
Technical parameters/power supply voltage: 3V ~ 3.6V
Encapsulation parameters/installation method: Surface Mount
Package parameters/number of pins: 56
Encapsulation parameters/Encapsulation: TFSOP-56
External dimensions/packaging: TFSOP-56
Physical parameters/operating temperature: 0℃ ~ 70℃
Other/Product Lifecycle: Unknown
Other/Packaging Methods: Tape & Reel (TR)
Compliant with standards/RoHS standards: RoHS Compliant
Compliant with standards/lead standards: Lead Free
| Model | Brand | Similarity | Encapsulation | Introduction | Data manual | |
|---|---|---|---|---|---|---|
72V82L15PA8
|
Integrated Device Technology | 完全替代 | TFSOP-56 |
FIFO Mem Async Dual Depth/Width Bi-Dir 1K x 9 x 2 56Pin TSSOP T/R
|
||
|
|
Renesas Electronics | 完全替代 | TSSOP-56 |
3.3伏的CMOS双异步FIFO DUAL 512× 9 ，双1024× 9双2048 ×9 ，双4096 ×9 DUAL 8,192 ×9 3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9 DUAL 8,192 X 9
|
||
72V82L15PAG
|
Integrated Device Technology | 完全替代 | TSSOP-56 |
3.3伏的CMOS双异步FIFO DUAL 512× 9 ，双1024× 9双2048 ×9 ，双4096 ×9 DUAL 8,192 ×9 3.3 Volt CMOS DUAL ASYNCHRONOUS FIFO DUAL 512 x 9, DUAL 1,024 x 9 DUAL 2,048 x 9, DUAL 4,096 X 9 DUAL 8,192 X 9
|
||
72V82L20PA8
|
Integrated Device Technology | 类似代替 | TFSOP-56 |
FIFO Mem Async Dual Depth/Width Bi-Dir 1K x 9 x 2 56Pin TSSOP T/R
|
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