Technical parameters/rated voltage (DC): | 50.0 V |
|
Technical parameters/Insulation resistance: | 100 GΩ |
|
Technical parameters/capacitance: | 0.01 µF |
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Technical parameters/tolerances: | ±1 % |
|
Technical parameters/operating temperature (Max): | 125 ℃ |
|
Technical parameters/operating temperature (Min): | -55 ℃ |
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Technical parameters/rated voltage: | 50 V |
|
Encapsulation parameters/installation method: | Surface Mount |
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Encapsulation parameters/Encapsulation (metric): | 4532 |
|
Encapsulation parameters/Encapsulation: | 1812 |
|
Dimensions/Length: | 4.5 mm |
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Dimensions/Width: | 4.5 mm |
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Dimensions/Height: | 1 mm |
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Dimensions/Packaging (Metric): | 4532 |
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Dimensions/Packaging: | 1812 |
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Physical parameters/medium materials: | Ceramic |
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Physical parameters/operating temperature: | -55℃ ~ 125℃ |
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Other/Product Lifecycle: | Active |
|
Other/Packaging Methods: | Tape & Reel (TR) |
|
Compliant with standards/RoHS standards: | RoHS Compliant |
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Compliant with standards/lead standards: | Lead Free |
|
| Model | Brand | Similarity | Encapsulation | Introduction | Data manual | |
|---|---|---|---|---|---|---|
18125A103FAT2A
|
AVX | 功能相似 | 1812 |
AVX 18125A103FAT2A 多层陶瓷电容器, 表面贴装, 0.01 µF, ± 1%, C0G / NP0, 50 V, 1812 [4532 公制]
|
||
VJ1812A103FXAAT
|
Vishay Semiconductor | 功能相似 | 1812 |
1812 10 nF 50 V ±1 % 容差 C0G/NP0 表面贴装 多层陶瓷电容
|
||
VJ1812A103FXAAT
|
VISHAY | 功能相似 | 1812 |
1812 10 nF 50 V ±1 % 容差 C0G/NP0 表面贴装 多层陶瓷电容
|
||
VJ1812A103FXAAT
|
Vishay Vitramon | 功能相似 | 1812 |
1812 10 nF 50 V ±1 % 容差 C0G/NP0 表面贴装 多层陶瓷电容
|
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