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Model 74LVC139D,112
Description NXP 74LVC139D,112 Chip, decoder/signal separator, dual channel, 2:4, SOIC-16
Product QR code
Brand: NXP
Packaging SOIC-16
Delivery time
Packaging method Cut Tape (CT)
Standard packaging quantity 1
1.09  yuan 1.09yuan
5+:
$ 1.4702
25+:
$ 1.3613
50+:
$ 1.2850
100+:
$ 1.2524
500+:
$ 1.2306
2500+:
$ 1.2033
5000+:
$ 1.1925
10000+:
$ 1.1761
Quantity
5+
25+
50+
100+
500+
Price
$1.4702
$1.3613
$1.2850
$1.2524
$1.2306
Price $ 1.4702 $ 1.3613 $ 1.2850 $ 1.2524 $ 1.2306
Start batch production 5+ 25+ 50+ 100+ 500+
Check the distribution price
  • Freight charges：   In stock Freight rate：$13.00
  • Quantity： Inventory(6241) Minimum order quantity(5)
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Technical parameters/power supply voltage (DC): 1.65V (min)

Technical parameters/number of output interfaces: 8

Technical parameters/number of pins: 16

Technical parameters/number of inputs: 2

Technical parameters/operating temperature (Max): 125 ℃

Technical parameters/operating temperature (Min): -40 ℃

Technical parameters/power supply voltage: 2.7V ~ 3.6V

Technical parameters/power supply voltage (Max): 3.6 V

Technical parameters/power supply voltage (Min): 1.65 V

Encapsulation parameters/installation method: Surface Mount

Package parameters/number of pins: 16

Encapsulation parameters/Encapsulation: SOIC-16

External dimensions/height: 1.45 mm

External dimensions/packaging: SOIC-16

Physical parameters/operating temperature: -40℃ ~ 125℃

Other/Product Lifecycle: Active

Other/Packaging Methods: Cut Tape (CT)

Other/Manufacturing Applications: Communications & Networking, Computers & Computer Peripherals

Compliant with standards/RoHS standards: RoHS Compliant

Compliant with standards/lead standards: Lead Free

Compliant with standards/REACH SVHC standards: No SVHC

Compliant with standard/REACH SVHC version: 2015/12/17

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Alternative material

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74LVC Family Decoders/Multiplexers, Texas Instruments Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems. Operating Voltage: 1.65 to 3.6V 5V tolerant inputs Compatibility: Input LVTTL/TTL, Output LVCMOS Latch-up performance exceeds 250 mA per JESD 17 ESD protection exceeds JESD 22 ### 74LVC 系列

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