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Model VC020105T101WP
Description AVXAny board level spatial constraints on multi-layer ceramic transient voltage suppressor ESD protection circuit AVX Multilayer Ceramic Transient Voltage Suppressors ESD Protection for any Circuit with Board Space Constraints
Product QR code
Brand: AVX
Packaging 0201
Delivery time
Packaging method Tape & Reel (TR)
Standard packaging quantity 1
0.33  yuan 0.33yuan
20+:
$ 0.4415
50+:
$ 0.4088
100+:
$ 0.3924
300+:
$ 0.3793
500+:
$ 0.3695
1000+:
$ 0.3630
5000+:
$ 0.3564
10000+:
$ 0.3499
Quantity
20+
50+
100+
300+
500+
Price
$0.4415
$0.4088
$0.3924
$0.3793
$0.3695
Price $ 0.4415 $ 0.4088 $ 0.3924 $ 0.3793 $ 0.3695
Start batch production 20+ 50+ 100+ 300+ 500+
Check the distribution price
  • Freight charges：   In stock Freight rate：$13.00
  • Quantity： Inventory(9355) Minimum order quantity(20)
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Technical parameters/rated voltage (DC): 5.60 V

Technical parameters/rated voltage (AC): 4.00 V

Technical parameters/capacitors: 100 pF

Technical parameters/tolerances: 30 %

Technical parameters/number of circuits: 1

Technical parameters/clamp voltage: 35 V

Technical parameters/rated voltage (DC Max): 5.6 V

Technical parameters/rated voltage (AC Max): 4 V

Encapsulation parameters/installation method: Surface Mount

Encapsulation parameters/Encapsulation (metric): 0603

Encapsulation parameters/Encapsulation: 0201

External dimensions/length: 0.6 mm

External dimensions/width: 0.3 mm

External dimensions/height: 0.33 mm

Dimensions/Packaging (Metric): 0603

External dimensions/packaging: 0201

Physical parameters/operating temperature: -55℃ ~ 125℃ (TA)

Other/Product Lifecycle: Active

Other/Packaging Methods: Tape & Reel (TR)

Compliant with standards/RoHS standards: RoHS Compliant

Compliant with standards/lead standards: Lead Free

Compliant with standards/REACH SVHC standards: No SVHC

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Alternative material

Model Brand Similarity Encapsulation Introduction Data manual
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AVX多层陶瓷瞬态电压抑制器ESD保护电路的任何与板级空间约束 AVX Multilayer Ceramic Transient Voltage Suppressors ESD Protection for any Circuit with Board Space Constraints
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