Technical parameters/number of logic gates: | 4000 |
|
Encapsulation parameters/installation method: | Surface Mount |
|
Encapsulation parameters/Encapsulation: | PLCC |
|
Dimensions/Packaging: | PLCC |
|
Other/Product Lifecycle: | Obsolete |
|
Compliant with standards/RoHS standards: | Non-Compliant |
|
Compliant with standards/lead standards: | Lead Free |
|
| Model | Brand | Similarity | Encapsulation | Introduction | Data manual | |
|---|---|---|---|---|---|---|
MACH221-15JC
|
Lattice Semiconductor | 完全替代 | PLCC |
CPLD MACH 2 Family 3.75K Gates 96 Macro Cells 66.6MHz EECMOS Technology 5V 68Pin PLCC
|
||
MACH221-7JC
|
Lattice Semiconductor | 完全替代 | PLCC |
CPLD MACH 2 Family 3.75K Gates 96 Macro Cells 133MHz 5V 68Pin PLCC
|
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