On July 31, Montage Technology announced the industry's first trial production of its CXL 3.2 MXC (Memory eXpansion Controller) chip – designed for AI data center and cloud infrastructure memory scaling.
The new chip is built on PCIe 6.x and CXL 3.2 protocols, supporting Type3 CXL.mem and CXL.io with a 64GT/s data rate. It integrates a dual-channel DDR5 memory controller up to 8000MT/s, effectively breaking traditional server memory bandwidth and capacity bottlenecks.
The hardware architecture includes PCIe 6.x PHY, DDR5 PHY, dual RISC-V subsystems, and multiple standardized management interfaces – enabling customers to develop PCIe AIC cards, EDSFF modules, and other CXL memory products across diverse server designs.
Montage also provides a full software development kit and test tools to accelerate time-to-market. The chip has already been adopted by top memory vendors including Samsung and SK Hynix for their next-gen CXL products, passing initial validation.
Montage President Stephen Tai noted this milestone accelerates the industry's adoption of CXL technology in data centers and AI infrastructure.
From ICgoodFind: 64GT/s and dual DDR5 channels – Montage just set the bar for CXL 3.2 memory expansion. With AI servers hungry for memory bandwidth, this chip arrives at exactly the right time.
